Zixuan Wang

• C
• x86 Assembly
• x86 Bootstrap
• KVM
• SeaBIOS
• UEFI
• AMD SEV
• AMD SEV-ES
• GNU Toolchain
• Linker Script

We are one of the first to build UEFI and AMD SEV/SEV-ES support in KVM-unit-tests, a widely-adopted KVM testing framework:

• Implement UEFI support as an alternative to the existing SeaBIOS+Multiboot solution.
• Implement AMD SEV and SEV-ES support

Source code:

• x86_64 UEFI and AMD SEV/SEV-ES support
  • Version 1
  • Version 2
  • Version 3
  • → 13 patches merged
• x86_64 UEFI set up process refactor and scripts fixes
  • Version 1
  • Version 2
  • → 6 patches merged
• x86_64 UEFI envs and args passing
  • Version 1

• C
• Linux Kernel
• x86 Assembly

We build the first profiler that can discover the non-volatile memory on-DIMM micro-architecture.

• LENS runs in Linux kernel space.
• Micro-benchamrks are written in x86 assembly.
• LENS discovers the complex micro-architecture design of NVRAM DIMM products.
• Source code

• C++ 17
• Python
• R
• Cycle Accurate Simulation

We build a cycle-level NVRAM simulator and validate its performance with Intel Optane Persistent Memory, the first commercially available NVRAM product.

• VANS takes advantage of modern C++ features to simplify the code and increase the simulation performance.
• VANS performance matches the real NVRAM products.
• Automated testing for VANS precision.
• Source code

• FGPA
• GPU
• Linux

We evaluated the GEN-Z memory prototype, and developed a framework for GPU to directly access GEN-Z memory through PCIe.

• cuDF library runs 16x faster compared to indirect access through CPU.

• FGPA
• Linux
• Userspace IO
• MIPS Assembly

An FPGA accelerator for high-frequency trading. We offload the decision procedure to FPGA, and forward incoming network data directly to FPGA. In this way, trading data doesn't go through NIC, PCIe, CPU, Main Memory to make a decision.

• Use FPGA to accelerate network response and decision making.
• Use 10-Gigabit Ethernet for communication between FPGA and PC.

• C
• ARM Assembly
• ARM Mbed OS
• Bootloader

micro:bit is a development board for students' programming training. It has an ARM Cortex-M0 processor, as well as many peripherals. But micro:bit developers need an emulator to help them debug the low-level code, so we made it on QEMU.

Develop:

• Implement Cortex-M0 features from QEMU's original Cortex-M3 emulator.
• Implement peripheral emulators, e.g., LED matrix, timer, clock generator, random number generator, etc.
• Organize CPU Virtual Address Space with regard to micro:bit's spec.
• Disassemble and reverse engineered micro:bit's Bootloader.
• Go through ARM Mbed OS to make sure hardware emulation is correct.
• Debug with QEMU and remote GDB, at assembly code level.

Result:

• It can run unmodified micro:bit example code written in C, Python, or JavaScript.
• Outstanding graduation thesis of the computer science department, Zhejiang University, 2018.
• Source code

• Open Source
• OS Design
• Bootloader
• C
• MIPS Asm
• Linker Script

A self-designed OS from the groud up, running on self-designed SoC or QEMU. We also implement the corresponding bootloader. This project serves as a sample for OS courses at Zhejiang University.

• Bootloader to load a kernel from filesystem.
• Interrupt and exception.
• Buddy + Slab memory management.
• Process scheduling.
• Userspace programs: shell, ls, ps...
• FAT and ext2 filesystem.

• Open Source
• FPGA
• Verilog

A self-designed SoC from groud up. It can run ZJUNIX as well as Arduino programs. This project serves as a sample for OS courses and Computer Hardware System courses in Zhejiang University.

• Self-implemented 5 stage pipeline MIPS32 CPU on FPGA, 93 instructions, 2 level cache.
• With 512M DDR3, VGA, PS2, SD controller.
• Capable of running ZJUNIX Operating System.
• Capable of running Arduino programs, with our implementation of Arduino library.
• Teamwork with two other undergraduate students.

• Image Processing
• Mechanical Design
• Real-time System
• FPGA

A portable modulized 3D bioprinter that prints tissue directly on wounds. The whole device fits in a 28-inch travel suitcase and can be assembled in several minutes.

• Using FPGA accelerated edge detector to fulfill the real-time computing.
• Utility model patent, 201720246090.1
• The outstanding prize of Challenge Cup, Zhejiang Province.
• Top 10 Academic Projects, Zhejiang University, 2017
• Teamwork with 8 other undergraduates.

• Computer Graphics
• FPGA

• FPGA for calculation, PC for rendering.
• FPGA communicates with PC through Ethernet.
• The second prize of Digilent Design Contest, 2017 China

• VS Code Extension
• Yaml
• Linker Script

• LaTeX

• LaTeX template, widely used by students at Zhejiang University
• Recommended by School of Undergraduates.

• Makefile

• MIPS Assembly
• Keyboard Interrupt
• VGA Display

• A Chinese pinyin IM written in pure MIPS assembly, ~2000 lines of code.
• It captures keyboard input, decodes English characters into pinyin, then queries the GB2312 database to find a corresponding Chinese character.
• Demo picture. (The code is lost, though.)

• Bison
• Flex
• C++ 11/14

• Lexical analysis
• Syntax analysis
• Abstract syntax tree
• Intermediate code generator