Zixuan Wang

I'm working in STABLE Lab and NVSL Lab, doing research on arch and system design for memory, recent works include:

• NVLeak: an off-chip memory architecture reverse engineering and covert/side channel attack framework.
• COARSE: a disaggregated memory system for distributed deep learning training.
• Ayudante: a learning-based persistent memory automatic programming framework.
• LENS: a profiler that discovers NVRAM DIMM micro-architecture design.
• VANS: a cycle-level NVRAM simulator that matches the real products' performance.

Build AMD SEV-SNP SVSM support in Google Cloud to enhance cloud users' data confidentiality. I received a peer bonus for my work.

Deployed the first confidential virtual machine platform in Meta.

Initiated and developed confidential virtual machine platform in Meta.

I developed UEFI and AMD SEV/SEV-ES supports for KVM-Unit-Tests. Code merged by the Linux KVM community. I received two peer bonuses during this internship.

We evaluated the performance of the CXL memory prototype and enabled GPU direct access to CXL memory.

I worked in Computer Architecture Lab, did research on operating system and computer architecture:

• We developed ZJUNIX operating system from scratch, and ran it on ZJU-SoC, which is a self-implemented MIPS SoC on FPGA.
• We also developed an FPGA accelerator for High-Frequency Trading.
• Another cool project is the Portable Modular 3D Bioprinter, which earned the Outstanding Prize in Challenge Cup.

• HCDS Workshop @ ASPLOS 2024

• NVMW'23 Memorable Paper Finalist

• Paper
• Code

• Paper

• Paper

• Paper

• NVMW'21 Memorable Paper Finalist
• IEEE Micro TopPicks 2021

• Paper
• Code
• LENS
• VANS
• MICRO'20 Video
• NVMW'21 Video
• NVMW'21 Slides

• Paper

• Submission Chair @ MICRO 2020
• Shadow TPC @ EuroSys 2023

I'm one of the founders and organizers of Students@Systems: We are a group of PhD students in the system research area and organizing a series of talks, podcasts, and panels to serve the students in the system community. Checkout our website and Twitter for the latest information.

I helped with organizing more than ten online events, including panels on applying for PhD, and interviews with researchers from underrepresented groups.

I have hosted the following panels:

• Getting a Job in Academia
• Empowering Your Research with Open Source
• Getting a Job in Academia, 2023

I served as submission co-chair for MICRO 2021, worked with program chairs to manage submissions and organize the TPC meeting.

I also open-sourced MightyPC, a toolkit I built to manage conference submissions, which has then been used by MICRO'21, IEEE MICRO TopPicks'22, HPCA'22, MICRO'22, DSN'23, and more.

Undergrad level computer arch course.

Developed and instructed a new course that guides students to develop their own CPU (using FPGA) to run their OS.

Developed and instructed a new course that guides students to develop their own OS from scratch.

• C
• x86 Assembly
• Linux Kernel
• Reverse Engineering
• Side-Channel Attacks

We are the first to reverse engineer the NVRAM and reveal its architecture design. Based on this we present one of the first architectural attacks based on NVRAM.

• Software-based reverse engineering of the micro-architecture of non-volatile main memory.
• Side-channel attacks that leaks sensitive information (database tables, private encryption keys).

• C
• x86 Assembly
• x86 Bootstrap
• KVM
• UEFI
• AMD SEV-SNP
• AMD SVSM
• Rust

I built the initial SVSM support in Google Cloud's Linux kernel, hypervisor, guest firmware, and guest kernel.

• Code will soon be posted in Linux kernel mailing list.

• QEMU
• C++
• x86 Assembly
• x86 Bootstrap
• KVM
• UEFI
• AMD SEV
• Rust

I built the initial software and operating system support for the first confidential virtual machine platform at Meta.

• The project was highlighted at Meta's Annual Security Summit.

• C
• x86 Assembly
• x86 Bootstrap
• KVM
• SeaBIOS
• UEFI
• AMD SEV
• AMD SEV-ES
• GNU Toolchain
• Linker Script

We are one of the first to build UEFI and AMD SEV/SEV-ES support in KVM-unit-tests, a widely-adopted KVM testing framework:

• Implement UEFI support as an alternative to the existing SeaBIOS+Multiboot solution.
• Implement AMD SEV and SEV-ES support

Source code:

• x86_64 UEFI and AMD SEV/SEV-ES support
  • Version 1
  • Version 2
  • Version 3
  • → 13 patches merged
• x86_64 UEFI set up process refactor and scripts fixes
  • Version 1
  • Version 2
  • → 6 patches merged
• x86_64 UEFI envs and args passing
  • Version 1

• CXL
• FPGA
• TensorFlow
• CUDA
• Verilog

We are the first to attach a CXL-based disaggregated memory to multi-GPU systems and demonstrate speedup in LLM training.

• Built a disaggregated memory prototype in FPGA.
• Train LLMs with much less GPUs by extending GPU memory space with CXL memory.

• C
• Linux Kernel
• x86 Assembly

We build the first profiler that can discover the non-volatile memory on-DIMM micro-architecture.

• LENS runs in Linux kernel space.
• Micro-benchamrks are written in x86 assembly.
• LENS discovers the complex micro-architecture design of NVRAM DIMM products.
• Source code

• C++ 17
• Python
• R
• Cycle Accurate Simulation

We build a cycle-level NVRAM simulator and validate its performance with Intel Optane Persistent Memory, the first commercially available NVRAM product.

• VANS takes advantage of modern C++ features to simplify the code and increase the simulation performance.
• VANS performance matches the real NVRAM products.
• Automated testing for VANS precision.
• Source code

• FPGA
• GPU
• Linux
• GEN-Z
• CXL

We evaluated the GEN-Z memory prototype, and developed a framework for GPU to directly access GEN-Z memory through PCIe.

• cuDF library runs 16x faster compared to indirect access through CPU.

• FGPA
• Linux
• Userspace IO
• MIPS Assembly

An FPGA accelerator for high-frequency trading. We offload the decision procedure to FPGA, and forward incoming network data directly to FPGA. In this way, trading data doesn't go through NIC, PCIe, CPU, Main Memory to make a decision.

• Use FPGA to accelerate network response and decision-making.
• Use 10-Gigabit Ethernet for communication between FPGA and PC.

• C
• ARM Assembly
• ARM Mbed OS
• Bootloader
• QEMU

micro:bit is a development board for students' programming training. It has an ARM Cortex-M0 processor, as well as many peripherals. But micro:bit developers need an emulator to help them debug the low-level code, so we made it on QEMU.

Develop:

• Implement Cortex-M0 features from QEMU's original Cortex-M3 emulator.
• Implement peripheral emulators, e.g., LED matrix, timer, clock generator, random number generator, etc.
• Organize CPU Virtual Address Space with regard to micro:bit's spec.
• Disassemble and reverse engineered micro:bit's Bootloader.
• Go through ARM Mbed OS to make sure hardware emulation is correct.
• Debug with QEMU and remote GDB, at assembly code level.

Result:

• It can run unmodified micro:bit example code written in C, Python, or JavaScript.
• Outstanding graduation thesis of the computer science department, Zhejiang University, 2018.
• Source code

• Open Source
• OS Design
• Bootloader
• C
• MIPS Assembly
• Linker Script

A self-designed OS from the ground up, running on self-designed SoC or QEMU. We also implement the corresponding bootloader. This project serves as a sample for OS courses at Zhejiang University.

• Bootloader to load a kernel from filesystem.
• Interrupt and exception.
• Buddy + Slab memory management.
• Process scheduling.
• Userspace programs: shell, ls, ps...
• FAT and ext2 filesystem.

• Open Source
• FPGA
• Verilog
• CPU Design
• Periperal Design

An SoC built from scratch. It can run ZJUNIX as well as Arduino programs. This project serves as a sample for OS courses and Computer Hardware System courses in Zhejiang University.

• Self-implemented 5 stage pipeline MIPS32 CPU on FPGA, 93 instructions, 2 level caches.
• With 512M DDR3, VGA, PS2, SD controller.
• Capable of running ZJUNIX Operating System.
• Capable of running Arduino programs, with our implementation of Arduino library.
• Teamwork with two other undergraduate students.

• Image Processing
• Mechanical Design
• Real-time System

A portable modular 3D bioprinter that prints tissue directly on wounds. The whole device fits in a 28-inch travel suitcase and can be assembled in several minutes.

• Demo Video
• Using FPGA accelerated edge detector to fulfill the real-time computing.
• Utility model patent, 201720246090.1
• The outstanding prize of Challenge Cup, Zhejiang Province.
• Top 10 Academic Projects, Zhejiang University, 2017
• Teamwork with 8 other undergraduates.

• Graphics Engine
• FPGA

• FPGA for calculation, PC for rendering.
• FPGA communicates with PC through Ethernet.
• The second prize of Digilent Design Contest, 2017 China

• VS Code Extension
• Yaml
• Linker Script

• VSCode Market
• GitHub Repo
• Over 180K installation

• LaTeX

• LaTeX template, widely used by students at Zhejiang University
• Recommended by School of Undergraduates.
• GitHub Repo
• Total GitHub stars: 2017

• Makefile

• GitHub Repo
• Total GitHub stars: 565

• MIPS Assembly
• Keyboard Interrupt
• VGA Display

• A Chinese pinyin IM written in pure MIPS assembly, ~2000 lines of code.
• It captures keyboard input, decodes English characters into pinyin, then queries the GB2312 database to find a corresponding Chinese character.
• Demo picture. (The code is lost, though.)

• Bison
• Flex
• C++ 11/14

• GitHub Repo
• Lexical analysis
• Syntax analysis
• Abstract syntax tree
• Intermediate code generator